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Communication dans un congrès

Fast Prototyping of a New Reconfigurable Architecture : Toward Tailored Space FPGA

Chagun Basha Basheer Ahmed 1 Sébastien Pillement 1 Loïc Lagadec 2, 3 Arnaud Tisserand 4
1 IETR - Institut d'Électronique et des Technologies du numéRique
2 Lab-STICC_ENSTAB_CACS_MOCS ; IDM
STIC - Pôle STIC [Brest], Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 Lab-STICC_ENSTAB_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192)
4 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
Abstract : Virtual prototyping supports fast exploration of design space for new embedded platforms. Uses of FPGA in critic environment requires to design adapted circuits at the cheapest cost possible. We then aim at developing a low-cost fault-tolerant FPGA. This work relies on a modular design flow and embedding custom logic units ranging from medium-to-coarse grained (e.g. arithmetic units, with dedicated encoding in order to address fault detection). The reconfigurable unit is modelled in a high level framework that outputs VHDL files to be later taken as input by commercial framework for implementation. As so, our prototyping environment supports both virtual prototype simulation and hardware emulation. Besides, it provides a baseline for manual refinement or modular replacement when going to silicon.
Type de document :
Communication dans un congrès
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https://hal.archives-ouvertes.fr/hal-01153568
Contributeur : Sandrine Charlier <>
Soumis le : mercredi 20 mai 2015 - 08:04:36
Dernière modification le : mercredi 14 octobre 2020 - 03:53:51

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  • HAL Id : hal-01153568, version 1

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CNRS | UNIV-BREST | UNIV-RENNES1 | INSTITUT-TELECOM | LAB-STICC_ENIB | ENIB | IETR | UNIV-NANTES | LAB-STICC | INRIA | CENTRALESUPELEC | IRISA | IRISA-D3 | ENSTA-BRETAGNE | ENSTA-BRETAGNE-STIC | UR1-UFR-ISTIC | IETR-SYSCOM | UNIV-RENNES | INSA-GROUPE | INSA-RENNES

Citation

Chagun Basha Basheer Ahmed, Sébastien Pillement, Loïc Lagadec, Arnaud Tisserand. Fast Prototyping of a New Reconfigurable Architecture : Toward Tailored Space FPGA. Conférence d’informatique en Parallélisme, Architecture et Système (Compas), Jun 2015, Villeneuve d'Ascq, France. pp.10. ⟨hal-01153568⟩

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