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hal-02088044v1
Communication dans un congrès
LiteX: an open-source SoC builder and library based on Migen Python DSL DATE 2019 Design Automation and Test in Europe, Mar 2019, Florence, Italy |
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hal-00958096v1
Communication dans un congrès
DESIGN AND IMPLEMENTATION OF A CACHE HIERARCHY-AWARE TASK SCHEDULING FOR PARALLEL LOOPS ON MULTICORE ARCHITECTURES PDCTA 2014, Feb 2014, Sydney, Australia |
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hal-01405860v1
Communication dans un congrès
ZeFF : Une plateforme pour l’intégration d’architectures overlay dans le Cloud COMPAS 2016, Jul 2016, Lorient, France |
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hal-01405912v1
Communication dans un congrès
Overlay Architectures For FPGA Resource Virtualization GDR SOC SIP, Jun 2016, Nantes, France |
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hal-00730497v1
Communication dans un congrès
UML/MARTE Process for SoC/SoPC Embedded Real Time Software and Systems Symposium, 2010, Toulouse, France. pp.201,209 |
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hal-01009572v1
Communication dans un congrès
Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators ICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia |
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hal-00690459v1
Communication dans un congrès
Meta-model Driven Reverse Engineering Approach to Ensure the Waveform Portability Workshop of Software Radio - WSR 2012, Apr 2012, Karlsruhe, Germany |
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hal-01643297v1
Article dans une revue
Extended overlay architectures for heterogeneous FPGA cluster management Journal of Systems Architecture, Elsevier, 2017, 78, pp.1-14. ⟨10.1016/j.sysarc.2017.06.001⟩ |
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hal-01475251v1
Communication dans un congrès
Soft timing closure for soft programmable logic cores: The ARGen approach ARC 2017 - 13th International Symposium on Applied Reconfigurable Computing, Delft University of Technology Apr 2017, Delft, Netherlands |
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hal-00486627v1
Communication dans un congrès
Predictibility of inter-components latency in a Software Communications Architecture Open Environment 24th IEEE International Parallel and Distributed Processing Symposium, Apr 2010, Atlanta, United States |
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hal-00486626v1
Communication dans un congrès
Latency estimation due to middleware used in Software Defined Radio Platform 6th Workshop on Software Radio, Mar 2010, Karlsruhe, Germany |
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hal-00676704v1
Communication dans un congrès
Domain Specific Modelling Applied to Smart Sensors Oceans 2011, Jun 2011, Santander, Spain. 2011 |
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hal-00728364v1
Communication dans un congrès
MHPM : Multi-Scale Hybrid Programming Model A flexible parallelization Medthodology HPCC 2012, Jun 2012, Liverpool, United Kingdom |
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hal-00704312v1
Communication dans un congrès
Une organisation des Lignes de Produits Logiciels autour d'un motif architectural CAL 2012, May 2012, Montpellier, France |
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hal-01006128v1
Communication dans un congrès
A Prototyping Platform for Virtual Reconfigurable Units RECOSOC 2014, May 2014, Montpellier, France |
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hal-00989661v1
Communication dans un congrès
A High-Level Programming Model to Ease Pipeline Parallelism Expression On Shared Memory Multicore Architectures HPC 2014, Apr 2014, Tampa, FL, United States. pp.XX |
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hal-00676640v1
Communication dans un congrès
Context Aware Model Exploration with OBP tool to Improve Model-Checking ERTS 2012, Feb 2012, Toulouse, France |
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hal-00738735v1
Article dans une revue
Improving Model Checking with Context Modelling Advances in Software Engineering, 2012, 2012, pp.ID 547157. ⟨10.1155/2012/547157⟩  |
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hal-00703785v1
Communication dans un congrès
Modélisation algorithmique et synthèse d'architectures assistées par model-checking CAL 2012-, May 2012, Montpellier, France |
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hal-00819668v1
Direction d'ouvrage, Proceedings, Dossier
Architecture des ordinateurs Loïc Lagadec and Sébastien Pillement and Arnaud Tisserand. 32, Hermes, pp.150, 2013, Technique et science informatique, 9782746245679 |
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hal-00771748v1
Communication dans un congrès
Relationships in Variability Modeling Approaches: A Survey and Classification 5ème journée Lignes de Produits, Nov 2012, Villeneuve d'Ascq, France |
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hal-00773497v1
Communication dans un congrès
Relationships Formalization for Model-Based Product Lines APSEC 2012, Dec 2012, Hong Kong SAR China. pp.187 |
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hal-01174435v1
Communication dans un congrès
Communication-aware Parallelization Strategies for High Performance Applications. ISVLSI'15 - IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France |
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hal-01623030v1
Communication dans un congrès
Asserting causal properties in High Level Synthesis 2017 IEEE 2nd International Verification and Security Workshop (IVSW), Jul 2017, Thessaloniki, Greece |
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hal-01405890v1
Communication dans un congrès
Overlay Architectures for Heterogeneous FPGA Cluster Management. DASIP 2016, Oct 2016, Rennes, France |
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hal-00747713v1
Communication dans un congrès
HLS-based Fast Design Space Exploration of ad hoc hardware accelerators: a key tool for MPSoC Synthesis on FPGA International Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2012, Germany |
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hal-00486625v1
Communication dans un congrès
A Comparative Study of Two Software Defined Radio Environments SDR Forum Technical Conference, Oct 2008, Washington, United States |
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hal-01172103v1
Article dans une revue
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA ACM Transactions on Embedded Computing Systems (TECS), ACM, 2016, 15 (1), pp.9 |
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hal-02283926v1
Communication dans un congrès
Risk assessment of SDR-based attacks with UAVs 2019 16th International Symposium on Wireless Communication Systems (ISWCS), Aug 2019, OULU, Finland |
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