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hal-00944548v1
Communication dans un congrès
A Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators ISCAS 2014 - IEEE International Symposium on Circuits and Systems, May 2014, Melbourne, Australia. pp.XX |
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hal-01009572v1
Communication dans un congrès
Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators ICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia |
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hal-01009551v1
Communication dans un congrès
A Design Approach to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerator GLSVLSI 2014, May 2014, Houston, United States |
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hal-00989918v1
Communication dans un congrès
Une approche de conception pour générer automatiquement des moniteurs sur puce pendant la synthèse de haut niveau d'accélérateurs matériels COMPAS 2014 - Conférence en Parallélisme, Architecture et Système, Apr 2014, Neuchâtel, Suisse |
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hal-01623030v1
Communication dans un congrès
Asserting causal properties in High Level Synthesis 2017 IEEE 2nd International Verification and Security Workshop (IVSW), Jul 2017, Thessaloniki, Greece |
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hal-01405531v1
Article dans une revue
A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerators IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩ |
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