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A Design Approach to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware AcceleratorGLSVLSI 2014, May 2014, Houston, United States
Communication dans un congrès
hal-01009551v1
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Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level SynthesisDATE'21 Design Automation and Test in Europe, Feb 2021, Grenoble (virtuel), France
Communication dans un congrès
hal-03228922v1
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Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware AcceleratorsICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia
Communication dans un congrès
hal-01009572v1
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Une approche de conception pour générer automatiquement des moniteurs sur puce pendant la synthèse de haut niveau d'accélérateurs matérielsCOMPAS 2014 - Conférence en Parallélisme, Architecture et Système, Apr 2014, Neuchâtel, Suisse
Communication dans un congrès
hal-00989918v1
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A Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware AcceleratorsISCAS 2014 - IEEE International Symposium on Circuits and Systems, May 2014, Melbourne, Australia. pp.XX
Communication dans un congrès
hal-00944548v1
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Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment2019 Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Mar 2019, Florence, Italy
Communication dans un congrès
hal-02052433v1
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A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware AcceleratorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩
Article dans une revue
hal-01405531v1
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