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hal-00470523v1  Communication dans un congrès
Philippe DhaussyPierre-Yves PillainStephen CreffAmine RajiYves Le Traon et al.  Evaluating Context Descriptions and Property Definition Patterns for Software Formal Validation
Model Driven Engineering Languages and Systems (Models'09), Oct 2009, Denver, United States. pp.438-452, ⟨10.1007/978-3-642-04425-0⟩
hal-00517222v1  Communication dans un congrès
Philippe DhaussyPierre-Yves PillainStephen CreffAmine RajiYves Le Traon et al.  Contribution à la formalisation de contextes et d'exigences pour la validation formelle de logiciels embarqués
Conférence Approches Formelles dans l'Assistance au Développement de Logiciels (AFADL'10), Poitiers-Futuroscope, 09-11, Jun 2010, Poitiers, France. pp.Non renseigne
hal-00517223v1  Communication dans un congrès
Thomas AbdoulJoël ChampeauPhilippe DhaussyPierre-Yves PillainJean-Charles Roger. AADL model transformation for formal verification
3rd IEEE International UML&AADL workshop (hosted by ICECCS 2008), Apr 2008, Belfast, Ireland
hal-00517269v1  Communication dans un congrès
Xavier DumasFrédéric BoniolPhilippe DhaussyEric Bonnafous. Partial Order Application for Software Formal Verification
Conférence Embedded Real Time Software and Systems (ERTS'10), May 2010, Toulouse, France. pp.Non renseigne
hal-00517272v1  Communication dans un congrès
Xavier DumasFrédéric BoniolPhilippe DhaussyEric Bonnafous. Context Constraints Method for Software Formal Verification
ESA Workshop on Avionics Data, Control and Software Systems (ADCSS), Nov 2009, Noordwijk, Netherlands
hal-00517277v1  Communication dans un congrès
Eric BonnafousFrédéric BoniolPhilippe DhaussyXavier Dumas. Experience of an efficient and actual MDE process : design and verification of ATC onboard system
Conférences on UML&FORMAL METHODS, Oct 2008, Kitakyushu-city, Japan
hal-00635533v1  Communication dans un congrès
Xavier DumasFrédéric BoniolPhilippe DhaussyEric Bonnafous. Application of partial-order methods for the verification of closed-loop SDL systems
SAC'11 - 26th Symposium On Applied Computing, Mar 2011, TaiChung, Taiwan. pp.ACM 978-1-4503-0113-8/11/03
hal-00635897v1  Communication dans un congrès
Xavier DumasFrédéric BoniolPhilippe DhaussyEric Bonnafous. Context Modelling and Partial-Order Reduction: Application to SDL Industrial Embedded Systems
IEEE SIES'10 - Symposium on industrial Embedded Systems, Jul 2010, Trento, Italy
hal-00635969v1  Chapitre d'ouvrage
Jean-Philippe BabauPhilippe DhaussyPierre-Yves Pillain. Model integration for formal qualification of timing-aware software data acquisition components
Model Driven Engineering for Distributed Real-Times and Embedded Systems, ISTE, pp.167-200, 2010
hal-00663182v1  Communication dans un congrès
Pierre-Yves PillainJoël ChampeauHanh Nhi Tran. Towards an Enactment Mechanism for MODAL Process Models
ECMFA 2011, Jun 2011, United Kingdom
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hal-01289454v1  Communication dans un congrès
S HeimXavier DumasE BonnafousPhilippe DhaussyC Teodorov et al.  Model Checking of SCADE Designed Systems
8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Jan 2016, TOULOUSE, France