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hal-01405531v1
Article dans une revue
A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerators IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩ |
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