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Designing a combined personal communicator and data entry terminal for disaster relief & remote operationsIEEE Global Humanitarian Technology Conference (GHTC), Oct 2019, Seattle, WA, United States
Communication dans un congrès
hal-02553261v1
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Carnac: Algorithm Variability for Fast Swarm Verification on FPGA2021 31st International Conference on Field-Programmable Logic and Applications (FPL), Aug 2021, Dresden, Germany. pp.185-189, ⟨10.1109/FPL53798.2021.00038⟩
Communication dans un congrès
hal-03550389v1
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A Design Approach to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware AcceleratorGLSVLSI 2014, May 2014, Houston, United States
Communication dans un congrès
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Preface to the special issue on advances in Smalltalk based systems96 (1), pp.1-3, 2014, Science of Computer Programming, Science direct, ⟨10.1016/j.scico.2014.07.004⟩
Ouvrages
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A Model-Driven Approach to Enhance Tool Interoperability using the Theory of Models of ComputationSLE 2013 - 6th International Conference on Software Language Engineering, Oct 2013, United States
Communication dans un congrès
hal-00912574v1
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Overlay Architectures for Heterogeneous FPGA Cluster Management.DASIP 2016, Oct 2016, Rennes, France
Communication dans un congrès
hal-01405890v1
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Proceedings of the 2012 International Workshop on Smalltalk TechnologiesACM digital library, pp.68, 2012, 978-1-4503-1897-6
Ouvrages
hal-00822656v1
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HLS-based Fast Design Space Exploration of ad hoc hardware accelerators: a key tool for MPSoC Synthesis on FPGAInternational Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2012, Germany
Communication dans un congrès
hal-00747713v1
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TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGAACM Transactions on Embedded Computing Systems (TECS), 2016, 15 (1), pp.9
Article dans une revue
hal-01172103v1
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Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware AcceleratorsICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia
Communication dans un congrès
hal-01009572v1
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Procédé de configuration d'un circuit logique programmable, circuit logique programmable et dispositif pour implémenter le procédéFrance, N° de brevet: FR3115134. 2022
Brevet
hal-04032489v1
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Finding the polygon hull of a network without conditions on the starting vertexTransactions on emerging telecommunications technologies, 2022, 33 (3), pp.e3696. ⟨10.1002/ett.3696⟩
Article dans une revue
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Temperature-based models of batteries for the simulation of Wireless Sensor Networks3rd International Conferenceon on Future Networks and Distributed Systems, Jul 2019, Paris, France. pp.1-6, ⟨10.1145/3341325.3342013⟩
Communication dans un congrès
hal-02303250v1
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Une approche de conception pour générer automatiquement des moniteurs sur puce pendant la synthèse de haut niveau d'accélérateurs matérielsCOMPAS 2014 - Conférence en Parallélisme, Architecture et Système, Apr 2014, Neuchâtel, Suisse
Communication dans un congrès
hal-00989918v1
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A Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware AcceleratorsISCAS 2014 - IEEE International Symposium on Circuits and Systems, May 2014, Melbourne, Australia. pp.XX
Communication dans un congrès
hal-00944548v1
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Model-driven physical-design automation for FPGAs: fast prototyping and legacy reuseSoftware: Practice and Experience, 2013, 44 (4), pp.455-482. ⟨10.1002/spe.2190⟩
Article dans une revue
istex
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JIT Compiler Security through Low-Cost RISC-V Extension30th Reconfigurable Architectures Workshop, May 2023, St Petersburg (Florida), United States
Communication dans un congrès
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PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption SchemesSECRYPT: 14th International Conference on Security and Cryptography, Jul 2017, Madrid, Spain
Communication dans un congrès
hal-01595789v1
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Architecture des ordinateursLoïc Lagadec and Sébastien Pillement and Arnaud Tisserand. Hermes, 32, pp.150, 2013, Technique et science informatique, 9782746245679
Ouvrages
hal-00819668v1
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ZeFF : Une plateforme pour l’intégration d’architectures overlay dans le CloudCOMPAS 2016, Jul 2016, Lorient, France
Communication dans un congrès
hal-01405860v1
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Advances in Smalltalk technologiesScience of Computer Programming, 2020, 199, pp.102518. ⟨10.1016/j.scico.2020.102518⟩
Article dans une revue
hal-02960557v1
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Menhir: Generic High-Speed FPGA Model-Checker2020 23rd Euromicro Conference on Digital System Design (DSD), Aug 2020, Kranj, Slovenia. pp.65-72, ⟨10.1109/DSD51259.2020.00022⟩
Communication dans un congrès
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Enhance the reusability of Models and their Behavioral correctnessMODELS 2013 - Workshop GEMOC, Sep 2013, Miami, United States
Communication dans un congrès
hal-00912587v1
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An Extended Modeling Approach for Marine/Deep-Sea ObservatoryThe 8th International Conference on Advanced Machine Learning and Technologies and Applications (AMLTA2022), May 2022, The Caire, Egypt. pp.502-514, ⟨10.1007/978-3-031-03918-8_42⟩
Communication dans un congrès
hal-03687138v1
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IWST 2022: International Workshop on Smalltalk Technologies 20223325, 2022
Proceedings/Recueil des communications
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Soft timing closure for soft programmable logic cores: The ARGen approachARC 2017 - 13th International Symposium on Applied Reconfigurable Computing, Delft University of Technology Apr 2017, Delft, Netherlands
Communication dans un congrès
hal-01475251v1
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Extended overlay architectures for heterogeneous FPGA cluster managementJournal of Systems Architecture, 2017, 78, pp.1-14. ⟨10.1016/j.sysarc.2017.06.001⟩
Article dans une revue
hal-01643297v1
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A Cost-effective Approach for Efficient Time-sharing of Reconfigurable ArchitecturesFPGA4GPC'2017, May 2017, Hambourg, Germany. ⟨10.1109/FPGA4GPC.2017.8008959⟩
Communication dans un congrès
hal-01656613v1
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A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware AcceleratorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩
Article dans une revue
hal-01405531v1
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High-performance language virtual machines: an analysis and challenges2022
Autre publication scientifique
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