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hal-00771758v1
Communication dans un congrès
From system-level models to heterogeneous embedded systems RITF 2012 - Recherche et Innovation pour les Transports du Futur, Nov 2012, Paris, France. pp.XX |
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hal-01867638v1
Communication dans un congrès
An Integrated Toolchain for Overlay-centric System-on-chip 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip 2018 (ReCoSoC 2018), Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449388⟩ |
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hal-00998533v1
Article dans une revue
Model-Driven Toolset for Embedded Reconfigurable Cores: Flexible Prototyping and Software-like Debugging Science of Computer Programming, Elsevier, 2014, pp.1. ⟨10.1016/j.scico.2014.02.015⟩ ![]() |
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Communication dans un congrès
Soft timing closure for soft programmable logic cores: The ARGen approach ARC 2017 - 13th International Symposium on Applied Reconfigurable Computing, Delft University of Technology Apr 2017, Delft, Netherlands |
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hal-01174435v1
Communication dans un congrès
Communication-aware Parallelization Strategies for High Performance Applications. ISVLSI'15 - IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France |
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hal-00728364v1
Communication dans un congrès
MHPM : Multi-Scale Hybrid Programming Model A flexible parallelization Medthodology HPCC 2012, Jun 2012, Liverpool, United Kingdom |
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hal-01090466v1
Chapitre d'ouvrage
XPU: A C++ Metaprogramming Approach to Ease Parallelism Expression: Parallelization Methodology, Internal Design and Practical Application Parallel Programming: Practical Aspects, Models and Current Limitations, NOVA publishers, pp.175-198, 2014, 978-1-60741-263-2 |
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hal-00730497v1
Communication dans un congrès
UML/MARTE Process for SoC/SoPC Embedded Real Time Software and Systems Symposium, 2010, Toulouse, France. pp.201,209 |
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hal-01643297v1
Article dans une revue
Extended overlay architectures for heterogeneous FPGA cluster management Journal of Systems Architecture, Elsevier, 2017, 78, pp.1-14. ⟨10.1016/j.sysarc.2017.06.001⟩ |
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hal-00703785v1
Communication dans un congrès
Modélisation algorithmique et synthèse d'architectures assistées par model-checking CAL 2012-, May 2012, Montpellier, France |
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hal-00989661v1
Communication dans un congrès
A High-Level Programming Model to Ease Pipeline Parallelism Expression On Shared Memory Multicore Architectures HPC 2014, Apr 2014, Tampa, FL, United States. pp.XX |
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hal-01405912v1
Communication dans un congrès
Overlay Architectures For FPGA Resource Virtualization GDR SOC SIP, Jun 2016, Nantes, France |
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hal-02960557v1
Article dans une revue
Advances in Smalltalk technologies Science of Computer Programming, Elsevier, 2020, 199, pp.102518. ⟨10.1016/j.scico.2020.102518⟩ |
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hal-01006128v1
Communication dans un congrès
A Prototyping Platform for Virtual Reconfigurable Units RECOSOC 2014, May 2014, Montpellier, France |
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hal-01405860v1
Communication dans un congrès
ZeFF : Une plateforme pour l’intégration d’architectures overlay dans le Cloud COMPAS 2016, Jul 2016, Lorient, France |
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hal-01405890v1
Communication dans un congrès
Overlay Architectures for Heterogeneous FPGA Cluster Management. DASIP 2016, Oct 2016, Rennes, France |
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hal-02513256v1
Communication dans un congrès
Towards a Hardware DSL Ecosystem: RubyRTL and Friends OSDA'2020 Open Source Hardware Design, colocated with DATE'20, Mar 2020, Grenoble, France |
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hal-02088044v1
Communication dans un congrès
LiteX: an open-source SoC builder and library based on Migen Python DSL OSDA 2019, colocated with DATE 2019 Design Automation and Test in Europe, Mar 2019, Florence, Italy |
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hal-01656613v1
Communication dans un congrès
A Cost-effective Approach for Efficient Time-sharing of Reconfigurable Architectures FPGA4GPC'2017, May 2017, Hambourg, Germany. ⟨10.1109/FPGA4GPC.2017.8008959⟩ |
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hal-00913335v1
Communication dans un congrès
Early exploring design alternatives of smart sensor software with Model of Computation implemented with actors ESUG 2013 - 21th International Smalltalk Conference, Sep 2013, Annecy, France |
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hal-00911269v1
Communication dans un congrès
JOG : une approche haut niveau des systèmes embarqués via Armadeus et Java 3èmes Journées Démonstrateurs 2010, Nov 2010, Angers, France |
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hal-00517468v1
Communication dans un congrès
Using MARTE in the MOPCOM SoC/SoPC Methodology Workshop MARTE, Colocated with DATE, Mar 2008, Munich, Germany |
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hal-00517464v1
Communication dans un congrès
MoPCoM Methodology: Focus on Models of Computation 6th European Conference on Modelling Foundations and Applications (ECMFA'10), Jun 2010, Paris, France. pp.Non renseigne |
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hal-02052433v1
Communication dans un congrès
Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment 2019 Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Mar 2019, Florence, Italy |
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hal-00958096v1
Communication dans un congrès
DESIGN AND IMPLEMENTATION OF A CACHE HIERARCHY-AWARE TASK SCHEDULING FOR PARALLEL LOOPS ON MULTICORE ARCHITECTURES PDCTA 2014, Feb 2014, Sydney, Australia |
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hal-00958087v1
Communication dans un congrès
Tackling Real-Time Signal Processing Applications on Shared Memory Multicore Architectures Using XPU ERTS 2014, Feb 2014, Toulouse, France |
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hal-01179466v1
Communication dans un congrès
A Meta Model Supporting both Hardware and Smalltalk-based Execution of FPGA Circuits IWST 2015, ESUG, Jul 2015, Bressia, Italy. ⟨10.1145/2811237.2811296⟩ |
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hal-01406641v1
Communication dans un congrès
CaRDIN: An Agile Environment for EdgeComputing on Reconfigurable Sensor Networks 3rd IEEE International Conference on Computational Science and Computational Intelligence (CSCI 2016), Dec 2016, Las Vegas, United States |
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hal-00354356v1
Communication dans un congrès
Using MARTE in a Co-Design Methodology MARTE UML profile workshop co-located with DATE'08, Mar 2008, Munich, Germany. 6 p |
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hal-00487063v1
Communication dans un congrès
CDFG Platform in MORPHEUS AETHER - MORPHEUS Workshop AMWAS'07, Oct 2007, Paris, France |
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