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hal-01867638v1  Communication dans un congrès
Jean-Christophe Le LannThéotime BollengierMohamad NajemLoïc Lagadec. An Integrated Toolchain for Overlay-centric System-on-chip
13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip 2018 (ReCoSoC 2018), Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449388⟩
hal-00944548v1  Communication dans un congrès
Mohamed Ben HammoudaPhilippe CoussyLoïc Lagadec. A Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators
ISCAS 2014 - IEEE International Symposium on Circuits and Systems, May 2014, Melbourne, Australia. pp.XX
hal-01089392v1  Direction d'ouvrage, Proceedings, Dossier
Loïc LagadecAlain Plantec. Preface to the special issue on advances in Smalltalk based systems
France. 96 (1), pp.1-3, 2014, Science of Computer Programming, ⟨10.1016/j.scico.2014.07.004⟩
hal-00822656v1  Direction d'ouvrage, Proceedings, Dossier
Loïc LagadecAlain Plantec. Proceedings of the 2012 International Workshop on Smalltalk Technologies
ACM digital library, pp.68, 2012, 978-1-4503-1897-6
hal-00487063v1  Communication dans un congrès
Jalil BoukhobzaLoïc LagadecAlain PlantecJean-Christophe Le Lann. CDFG Platform in MORPHEUS
AETHER - MORPHEUS Workshop AMWAS'07, Oct 2007, Paris, France
hal-01757093v1  Communication dans un congrès
Cyrielle FeronVianney LapotreLoïc Lagadec. Fast Evaluation of Homomorphic Encryption Schemes Based on Ring-LWE
2018 9th IFIP International Conference on New Technologies, Mobility and Security (NTMS), Feb 2018, Paris, France. ⟨10.1109/NTMS.2018.8328693⟩
hal-00747713v1  Communication dans un congrès
Youenn CorreVan-Trinh HoangJean-Philippe DiguetDominique HellerLoïc Lagadec. HLS-based Fast Design Space Exploration of ad hoc hardware accelerators: a key tool for MPSoC Synthesis on FPGA
International Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2012, Germany
hal-00780378v1  Communication dans un congrès
Youenn CorreJean-Philippe DiguetLoïc LagadecDominique HellerDominique Blouin. Fast Template-based Heterogeneous MPSoC Synthesis on FPGA
9th Int. Symposium on Applied Reconfigurable Computing, Mar 2013, Los Angeles, United States
hal-01595789v1  Communication dans un congrès
Cyrielle FeronVianney LapotreLoïc Lagadec. PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes
SECRYPT: 14th International Conference on Security and Cryptography, Jul 2017, Madrid, Spain
hal-02553261v1  Communication dans un congrès
Paul Gardner-StephenAngus WallaceLucas MossLoïc LagadecMatthew Lloyd. Designing a combined personal communicator and data entry terminal for disaster relief & remote operations
IEEE Global Humanitarian Technology Conference (GHTC), Oct 2019, Seattle, WA, United States
hal-02960557v1  Article dans une revue
Loïc LagadecAnne EtienJannik Laval. Advances in Smalltalk technologies
Science of Computer Programming, Elsevier, 2020, 199, pp.102518. ⟨10.1016/j.scico.2020.102518⟩
hal-00726481v1  Communication dans un congrès
Youenn CorreJean-Philippe DiguetDominique HellerLoïc Lagadec. A framework for high-level synthesis of heterogeneous MP-SoC
GLSVLSI, May 2012, Salt Lake City, United States. pp.283-286, ⟨10.1145/2206781.2206850⟩
hal-03028409v1  Communication dans un congrès
Emilien FournierCiprian TeodorovLoïc Lagadec. Menhir: Generic High-Speed FPGA Model-Checker
2020 23rd Euromicro Conference on Digital System Design (DSD), Aug 2020, Kranj, Slovenia. pp.65-72, ⟨10.1109/DSD51259.2020.00022⟩
hal-01006128v1  Communication dans un congrès
Loïc LagadecJean-Christophe Le LannThéotime Bollengier. A Prototyping Platform for Virtual Reconfigurable Units
RECOSOC 2014, May 2014, Montpellier, France
hal-01009572v1  Communication dans un congrès
Mohamed Ben HammoudaPhilippe CoussyLoïc Lagadec. Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators
ICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia
hal-00989918v1  Communication dans un congrès
Mohamed Ben HammoudaPhilippe CoussyLoïc Lagadec. Une approche de conception pour générer automatiquement des moniteurs sur puce pendant la synthèse de haut niveau d'accélérateurs matériels
COMPAS 2014 - Conférence en Parallélisme, Architecture et Système, Apr 2014, Neuchâtel, Suisse
hal-01623030v1  Communication dans un congrès
Erwan FabianiLoïc LagadecMohamed Ben HammoudaCiprian Teodorov. Asserting causal properties in High Level Synthesis
2017 IEEE 2nd International Verification and Security Workshop (IVSW), Jul 2017, Thessaloniki, Greece
hal-00912574v1  Communication dans un congrès
Papa Issa DialloJoël ChampeauLoïc Lagadec. A Model-Driven Approach to Enhance Tool Interoperability using the Theory of Models of Computation
SLE 2013 - 6th International Conference on Software Language Engineering, Oct 2013, United States
hal-00912587v1  Communication dans un congrès
Papa Issa DialloJoël ChampeauLoïc Lagadec. Enhance the reusability of Models and their Behavioral correctness
MODELS 2013 - Workshop GEMOC, Sep 2013, Miami, United States
hal-00782814v1  Article dans une revue
Ciprian TeodorovLoïc Lagadec. Model-driven physical-design automation for FPGAs: fast prototyping and legacy reuse
Software: Practice and Experience, Wiley, 2013, 44 (4), pp.455-482. ⟨10.1002/spe.2190⟩
hal-01405531v1  Article dans une revue
Mohamed Ben HammoudaPhilippe CoussyLoïc Lagadec. A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerators
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩