%0 Conference Paper %F Oral %T Asserting causal properties in High Level Synthesis %+ Lab-STICC_UBO_CACS_MOCS %+ Pôle STIC_IDM %+ Lab-STICC_ENSTAB_ CACS_MOCS %A Fabiani, Erwan %A Lagadec, Loïc %A Hammouda, Mohamed Ben %A Teodorov, Ciprian %< avec comité de lecture %B 2017 IEEE 2nd International Verification and Security Workshop (IVSW) %C Thessaloniki, Greece %8 2017-07-03 %D 2017 %Z Computer Science [cs]/Embedded Systems %Z Computer Science [cs]/Hardware Architecture [cs.AR]Conference papers %G English %L hal-01623030 %U https://hal.science/hal-01623030 %~ UNIV-BREST %~ INSTITUT-TELECOM %~ ENSTA-BRETAGNE %~ CNRS %~ UNIV-UBS %~ ENSTA-BRETAGNE-STIC %~ LAB-STICC_UBO_CACS %~ LAB-STICC_UBO %~ ENIB %~ LAB-STICC_ENIB %~ LAB-STICC %~ IBNM %~ INSTITUTS-TELECOM