From Smalltalk to Silicon: Towards a methodology to turn Smalltalk code into FPGA

Le Xuan Sang 1 Loïc Lagadec 1 Luc Fabresse 2 Jannik Laval 2 Noury Bouraqadi 2
1 Lab-STICC_ENSTAB_CACS_MOCS ; IDM
STIC - Pôle STIC [Brest], Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : Due to their ability to combine high performances along with flexibility, FPGAs (Field Programmable Gate Array) are used in robotic applications nowadays, especially in case of realtime applications. The FPGA circuits are often designed and configured using the Hardware Description Languages (HDLs) like VHDL or Verilog. However, although these languages provide abstractions up to the functionality level, they lack many features of todays modern languages that make them unsuited for high-level models and systems. In this paper, we present an overview of a methodology that uses a Dynamic Reflective Language, such as Smalltalk, for high level hardware/software co-design on FPGAs.
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Le Xuan Sang, Loïc Lagadec, Luc Fabresse, Jannik Laval, Noury Bouraqadi. From Smalltalk to Silicon: Towards a methodology to turn Smalltalk code into FPGA. IWST 14, Aug 2014, Cambridge, United Kingdom. ⟨hal-01326520⟩

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