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Communication dans un congrès

A Formal, Model-driven Design Flow for System Simulation and Multi-core Implementation

Papa Issa Diallo 1 Seyed-Hosein Attarzadeh-Niaki 2 Francesco Robino 2 Ingo Sander 2 Joel Champeau 1, 3 Johnny Oberg 4
1 Lab-STICC_ENSTAB_CACS_MOCS ; IDM
STIC - Pôle STIC [Brest], Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 Lab-STICC_ENSTAB_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192)
Abstract : With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.
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https://hal.archives-ouvertes.fr/hal-01156537
Contributeur : Annick Billon-Coat <>
Soumis le : mercredi 27 mai 2015 - 15:16:03
Dernière modification le : mercredi 24 juin 2020 - 16:19:29

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  • HAL Id : hal-01156537, version 1

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Papa Issa Diallo, Seyed-Hosein Attarzadeh-Niaki, Francesco Robino, Ingo Sander, Joel Champeau, et al.. A Formal, Model-driven Design Flow for System Simulation and Multi-core Implementation. SIES 2015, University of Siegen, Jun 2015, Siegen, Germany. ⟨hal-01156537⟩

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