%0 Conference Proceedings
%T A Prototyping Platform for Virtual Reconfigurable Units
%+ Lab-STICC_ENSTAB_CACS_MOCS
%A Lagadec, Loïc
%A Le Lann, Jean-Christophe
%A Bollengier, Théotime
%< avec comité de lecture
%( RECOSOC 2014
%B RECOSOC 2014
%C Montpellier, France
%P xx
%8 2014-05-26
%D 2014
%K Reconfigurable Architecture
%K Virtual FPGA
%K Prototyping platform.
%K Prototyping platform
%Z Computer Science [cs]/Hardware Architecture [cs.AR]
%Z Computer Science [cs]/Modeling and SimulationConference papers
%X Virtualization has been a key enabler for trading raw performances for programmability, straightforward reuse and higher abstraction in the software world. Similarly, Virtual FPGAs define intermediate fabrics, on which to implement applications regardless of the physical target. In order to make legacy applications run on up-to-date targets, only porting the vFPGAs to these targets is required, resulting in factorizing the development costs. Virtualization has a cost though, that one can reduce by tailoring the vFPGA based on applications class requirements. Then, prototyping Virtual FPGAs comes to be central. This paper introduces a platform dedicated to prototyping virtual FPGAs. We offer to generate vFPGA based on ADL specification along with exploitation tools. vFPGAs appear as IPs to be embedded into the platform
%G English
%L hal-01006128
%U https://hal.science/hal-01006128
%~ UNIV-BREST
%~ INSTITUT-TELECOM
%~ ENSTA-BRETAGNE
%~ CNRS
%~ UNIV-UBS
%~ ENSTA-BRETAGNE-STIC
%~ LAB-STICC
%~ TDS-MACS
%~ INSTITUTS-TELECOM