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Communication Dans Un Congrès Année : 2003

DESIGN TROTTER: Inter-Function Cycle Distribution Step

Résumé

This work is located in the domain of System On Chip design and specifically addresses the question of HW/SW parallelism allocation and scheduling at a system level. This paper describes the inter-function (or inter-task) estimation step within our system-level design framework. Given resource/delay trade-off curves for each function (i.e. functional block) of a complex application we propose a genetic-based method to the distribute time ratio over the set of functions in order to respect the time constraints while favoring intra and inter-function resource sharing. The aim of this task is to provide a global approach of the system in order to converge towards a promising HW/SW target architecture.

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Dates et versions

hal-00008493 , version 1 (07-09-2005)

Identifiants

  • HAL Id : hal-00008493 , version 1

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Thierry Gourdeaux, Jean-Philippe Diguet, Jean-Luc Philippe. DESIGN TROTTER: Inter-Function Cycle Distribution Step. Real-Time Systems, 2003, Paris, France. ⟨hal-00008493⟩
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